Undergraduate student (R0) per el Barcelona Supercomputing Center

The Computer Architecture and Operating System group at the Barcelona Supercomputing Center aims at carrying out research on programming models for critical embedded systems in charge of controlling fundamental parts of cars, airplanes and satellites. Our work is mainly done in the context of bilateral projects with several processor companies as well as several European-funded projects. For a complete list of publications of the group in the last years, please visit: www.bsc.es/caos

The objective of this position is to work in a small team on hardware design. The student will be mentored by experienced senior researchers, will collaborate with engineers taking care of major developments, and interact with other students working in related topics.

The developments and investigations will occur in the scope of European projects, and will be implemented on VHDL/Verilog/SystemVerilog. The student is expected to have some knowledge of VHDL, Verilog or SystemVerilog programming.

Key Duties

Participate in the development of new features for the SafeSU component as part of ISOLDE and other projects

Implement developments in FPGA prototypes with the help of experienced engineers and students

Evaluate the designs with in-home benchmarks

Data de tancament: Dimecres, 31 Gener, 2024

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