The main goal of this position is to design and implement a new vector unit for the general-purpose RISCV processor. In the first phase, we will work at the architectural level using simulation environments and modeling. In the second phase, we will implement it at least in behavioral models at the RTL level.
Key Duties
- Hardware modeling and performance evaluation using simulation tools with High Performance Computing requirements as part of a team.
- Simulate vector architecture
- Develop a new vector architecture for general purpose processor
- Coordinate with a local team at BSC and an international team from different European institutions.
Data de tancament: Dimecres, 15 Gener, 2025
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