Master Student - Electronic engineering per el Barcelona Supercomputing Center

The BSC is developing several ASICs based on the RISC-V processor. The RTL description must undergo several steps in the design flow until generating a physical description with a particular technology. We plan to use Siemens tools and design flow for the physical design of a representative design.

Key Duties

Study the design flow of the synthesis and place an route in the Siemens environment.

Evaluate the technology design kit and identify files needed for Siemens tools.

Generate Tcl scripts to perform synthesis and physical design and obtain reports for the selected design.

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Més entrades de Beques