The Barcelona Supercomputing Center (BSC) www.bsc.es is coordinating a large scale 45 partner project to produce Supercomputing Processor Chiplets that has the potential to be deployed in BSCs next generation supercomputer, the Marenostrum 6 (MN6), which will be operational in 2028/2029. RAS in general and Reliability in particular, is a core requirement for HPC processor designs.
The successful candidate will work on RAS implementation and should ideally have previous experience working on hardware reliability.
Key Duties
- RTL development of adding reliability features to scalar and vector processors
- Contributing to reports, project reviews, and research
Data de tancament: Dilluns, 31 Març, 2025
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