divendres, 18 d’abril de 2014

Early Stage Researcher Position – Signal Processing for Powerline Communications per el CTTC

This PhD position is one of 13 positions offered under the ADVANTAGE ITN project. This PhD project is focused on the improvement of the achievable rates of PLC systems in three communication scenarios: home, access electric grid, and medium voltage (MV) grid. Main challenges in the design of PLC systems in these environments are the presence of external interference and the severe frequency selectivity, requiring specific signal processing techniques that will alleviate the effect of these imperfections. This PhD project will consist of: characterization of the PLC channel in the home, access electric grid, and MV grid; pre-coding and decoding schemes tailored to the PLC channel; equalization strategies and modulation design for PLC systems.
The Early Stage Researcher on this project will benefit from the partnership between academic institutions and industrial partners. They will attend initial school training events and thus be exposed to the research activities of all participants at regular six monthly progress meetings. They will engage in training events, visits to companies and secondments to other project partners.
Deadline: 30/04/2014

Més informació

Més treball en recerca